DrPrabhat Mishra

Symbolic and Statistical Evaluation of Firmware Security Vulnerabilities

Few-shot In-context Learning for Robust Semantic Transfer Using Multi-modal Foundation Models and Formal Methods (FIRST-FM)

Measurement-induced Steering of Variational Quantum Algorithms

Automated Data Augmentation for Deflating Data Bias

Compositional Security Verification of Trusted Execution Environments

ABIL - AISS by Industry Leaders

Effective Utilization of Assertions for SoC Trust Validation

Scalable Validation of System-on-Chip Vulnerabilities using Security Assertions

SaTC: CORE: Small: Trustworthy System-on-Chip Design using Secure On-Chip Communication Architecture

MEST: MicroElectronics Security Training Program

SHF: Small: Design-for-Debug Architecture for Post-Silicon Security Validation

Defending against Adversarial Attacks on Deep Learning Systems

SoC Trust Verification using Security Assertions and Checkers

Phase II: Scalable Hardware Trojan Detection using Statistical Test Generation and Side Channel Analysis

Verification of IP Security and Trust- UFF 209 Acct

University of Florida GAANN Program on Computer Systems

CSR: Small: Collaborative Research: Dynamic Reconfiguration for Adaptive Computing in Heterogeneous SoCs

2015 IBM Faculty Award: Leveraging Pre-Silicon Efforts for Efficient Post-Silicon Validation and Debug

SaTC:STARSS:Collaborative Research: IPTrust: A Comprehensive Framework for IP Integrity Validation

IPTrust: A comprehensive Framework for IP Integrity Validation

SHF: Small: Automated Techniques for Efficient Post-Silicon Validation and Debug of Integrated Circuits